1. Field
The present disclosure relates to a One Time Programmable (OTP) Memory, and more specifically it relates to a circuit for reading a OTP memory.
2. Description of Related Art
An OTP memory is a non-volatile memory that, once programmed, can no longer perform a programming operation and can only perform a reading operation. A fuse type cell structure is widely used as a unit-cell of an OTP memory. The fuse type unit cell reads a data value based on whether a fuse is electrically short or not.
An anti-fuse is a type of an OTP memory using the fuse type cell that does not require an addition process to form a fuse mainly because a transistor gate oxide layer is used as the fuse. The anti-fuse uses an oxide layer. The anti-fuse is electrically opened prior to executing a programming operation and operates as a capacitor. Once it is programmed, the anti-fuse becomes electrically short as the gate oxide layer is destroyed.
The programming operation of an anti-fuse involves applying a high voltage that is higher than a break-down voltage, thereby destroying the gate oxide layer. A read operation involves applying a positive voltage supply (VDD) or a negative voltage supply (VSS) to a detecting node that is connected to the anti-fuse, outputting a predetermined current and reading whether the anti-fuse is electrically short by measuring the voltage at the detecting node. If the anti-fuse is in an electrically short state after the programming operation, the voltage at the detecting node changes as a current is applied through the anti-fuse. However, if the anti-fuse is electrically open, the voltage at the detecting node becomes a read voltage. That is, when the anti-fuse is viewed as a resistance, the anti-fuse in an electrically open state has an unlimited resistance. Accordingly, the voltage at the detecting node is determined by a read voltage, but when the anti-fuse is electrically short, the voltage at the detecting node is determined based on a resistance ratio of a read voltage generator and the anti-fuse that are connected in series.
Herein, although a gate oxide layer of an anti-fuse is destroyed, the detecting node cannot completely converge to the VDD or the VSS that is connected to a different electrode of the anti-fuse since the anti-fuse has a predetermined resistance value. Accordingly, the circuit for reading an OTP memory needs to obtain a margin of a logic threshold voltage to improve a detecting rate of the detecting node.
The circuit for reading an OTP memory reads a voltage at the detecting node during a read operation, which improves a detecting rate using, for example, a buffer with an adjusted logic threshold voltage, a differential amplifier, or the like.
However, an anti-fuse resistance has a predetermined range of error due to irregularities, such as, for example, temperature, process variables, and the like. Further, a voltage of an anti-fuse gate electrode can fluctuate due to exposure to various forms of noise. Herein, when the voltage of the detecting node connected to the anti-fuse fluctuates at a logic threshold voltage level, a buffer or a differential amplifier may output a wrong signal due to the fluctuation of the voltage at the detecting node.
Further, an amplifier to improve the detecting rate consumes additional voltage and current, and thus requires additional space for a circuit to provide such voltage and current to the amplifier.
Generally, after manufacturing an OTP memory, testing is performed to determine whether it is programmed or not at a stable voltage and room temperature. However, in reality, OTP memories are used in different environments and conditions, and OTP memories that have been determined to be normal during the testing may operate abnormally in a real-life environment. Accordingly, there may be credibility issues with the test result because the read voltage margin may not be obtained.